Shared Projects by dewhisna

This board uses a FT232RNL FTDI chip with a IF-D91B and IF-E96E fiber optic pair to provide a fiber optic serial I/O data stream conversion to/from USB. This board is designed to be used with the DRSSTCDAQ-V3 DRSSTC Data Acquisition Board. However, you can use two of these boards to communicate between two computers via a fiber optic link.

ERRATA:

• The Fiber Optic Receiver transimpedance amp gain is way too high, even with the sensitivity potentiometer turned all the way down, unless you have an extremely long fiber run or a very horrible fiber cable. Use a 4.7K resistor for R1 instead of the 470K. The 1M pot still works fine and might could even be a 500K. But definitely change the series resistor.

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DRSSTC Data Acquisition Board for DRSSTCDriver-V5.1 designed as a modular stacked pair. This board is a successor to the DRSSTCDAQ-V2 board. The major new thing with this board is changing microprocessors from the ATmega328PB to the STM32G0B1CET6.

See the Fiber Optic to USB Serial Interface V1 board for a fiber optic to USB interface for this board.

ERRATA:

• Due to an upstream source footprint library issue, the pads for the footprint of U14, the WIZ850io Ethernet module, are undersized. They are 30mils and should have been either 39mil (or 1mm) or 42mil. They have to be an absolute minimum of about 36mil to force fit the module onto the board. The best workaround solution is to remove the pins from the WIZ850io board and replace them with smaller diameter pins. A less good workaround is to hand-drill the holes to the needed size, but since that destroys the thru-hole plating, then you’ll have to fix the three connections that are made on the top side of the board – namely, MOSI, nINT, and +3.3V. Those will require either jump wires or careful soldering to the pads on the top side of the board. This will be fixed on V3.1.

• The Fiber Optic Receiver transimpedance amp gain is way too high, even with the sensitivity potentiometer turned all the way down, unless you have an extremely long fiber run or a very horrible fiber cable. Use a 4.7K resistor for R74 instead of the 470K. The 1M pot still works fine and might could even be a 500K. But definitely change the R74 series resistor.

ERRATA: While not technically a problem with the PCB, the STM32G050F6Px processor that was intended to be used on this board doesn’t have nearly enough flash space for the code required to implement the desired display functionality. However, there’s a drop-in replacement with the STM32G051F8Px, which doubles the flash size from 32K to 64K, which is sufficient. Therefore, when building this board, use the STM32G051F8Px instead. Note the “8” in the part number. That’s the important number that means 64K instead of 32K. Note that it’s also a change in the processor family from the G050 to the G051, since the G050 family doesn’t have a F8 variant.

V3 Update to the I2C Character Display CPU V2 Board. This board goes inline between a host CPU and an OLED (or similar) I2C/SPI graphical display. Its purpose is to convert the graphical display into a character-based display, removing the overhead of font rendering and pixel transfer over the slow I2C bus from the host.

This version is an overall enhancement, using the STM32G050F6P6 STM32G051F8P6 MCU instead of the ATmega328PB. The new processor gives much more computing power for better graphics frame buffers (having 18K of RAM instead of only 2K) and a higher (up to 64MHz) processing speed. It’s also better suited for working with both 5V and 3.3V displays and host systems.

Like the V2 board, it also supports interfacing with the display using either I2C or SPI. But unlike the V1 and V2 boards, there’s no need for a board with a reversed connector. The V1 and V2 boards required that because the ISP port on those versions was a dual-row connection and so couldn’t be mounted on the reverse side. This board only has single-row connections and so the pinout is identical whether the header connectors are mounted on the top or bottom.

For ISP programming of this board, there are two options. You can use either the USART FTDI compatible port or the Host I2C connection and enable the STM32 boot loader via the BOOT0 jumper. If you have an adapter to program via the I2C port, you can elect to not populate the USART/FTDI connector and associated level-shifting logic components unless you want that port for debugging or other serial communications purposes.

This board is designed to work with either 3.3V or 5V displays. For 3.3V displays, skip populating the on-board voltage regulator and bridge the solder-jumper integrated into its footprint. You do, however, have to supply 3.3V power on the Host I2C and this board becomes a “3.3V display device”. For 5V displays, supply 5V on the Host I2C and populate the voltage regulator.

Important: This processor doesn’t enable the external BOOT0 pin by default. Therefore, in your firmware, be sure to either enable the BOOT0 pin during the very first programming via the bootloader over the FTDI link, or make sure your firmware enables the bootloader in some fashion, or you will not be able to program the processor a second time without manually patching onto the SWD pins.

One neat programming mechanism is for the firmware to simply set the EMPTY flag in `FLASH->ACR during initial setup. That will allow any reset that isn’t a POR or OBL_LAUNCH reset (i.e. a reset that doesn’t reload the boot option bytes) to run the bootloader instead. Using this mechanism and with the DTR jumper in place on the FTDI port, you can have stm32flash, via the -i option, toggle the DTR line and automatically reset this board and put it in the bootloader without needing to install the BOOT0 or worry about the option bytes at all. Or, you can even do both, so that there’s a fallback.

Driver board for a Dual-Resonance Solid-State Musical Tesla Coil. This version is a minor update to the DRSSTCDriver V5 design. It uses a CPLD for adding freewheeling support. For freewheeling, it requires a V2 Driver Bridge daughter board (either: UCC37322D V2 or FDD8424H V2 ).

This board fixes the OPF2412T footprint errata. It also replaces the pulse-width-limiter (PWL) circuit with a new LTC6993-2 variant. The original PWL required as long (or longer) off-time for the fiber optic pulse-width as the on-time, which doesn’t work well for certain types of interrupter drive (like music, for example). It only worked well for BPS (or bangs per second) drive. This version also adds a new configuration jumper for enabling/disabling the feedback delay loop. And it adds an enable/disable jumper for the HVFault input, along with an additional filter cap for that input. Additionally, several component values were tweaked with numbers better suited for most coils.

See also the DRSSTC Data Acquisition Board V3 for a matching data acquisition board for this driver board.

ERRATA:

• UVLO issue : The output of U9 (LM8365BALMF27) Vlo level is too high to properly trigger the CPLD Schmitt-trigger input due to the Vf drop of D14 and with the low impedance of R53 and R19, and is even worse when the TCDAQ is present as it adds to the low impedance of R53. Use a MBR0530 Schottky diode for D14 in place of the LL4148. Use a 100K resistor for R19 in place of the 1K and use a 10K resistor for R53 in place of the 1K.

OPF2412T Mezzanine board to fix the DRSSTC V5 driver board secondary fiber optic input. See the ERRATA for that board.