FPGA-Based Solid-State Stereo Musical Tesla Coil Interrupter interface board. Uses the Numato Mimas Spartan 6 FPGA Module to generate 512-note polyphony (256 per channel) Tesla Coil interrupter signals to drive two Musical Tesla Coils in stereo from MIDI and other audio sources at a 1.5625 MHz note-timer resolution.
It was originally designed to function with the Netduino Plus 2 host processor board, but will function with any Arduino R3 compatible host processor. It supports both 3.3v and 5v host interfaces with on-board level translators. Power can be supplied with 7.4v LiPo battery pack and monitored with on-board low-voltage detector circuit. This board includes a 4-button keypad connector and an I2C Interface circuit for connecting a 4x20 or similar character-based LCD screen (or other +5V I2C devices).
I built this to run two of the original v.1 old-style oneTesla Musical Tesla Coils running in stereo. I wanted something more hi-fidelity than their simplistic 2-note interrupter. I wanted an interrupter that you could actually play an entire orchestral piece through with complete fidelity, including pitch-bends and power level shift nuances. The only way to get enough capture-compare timers was to use an FPGA. I made the VHDL code for the FPGA available on OpenCores as Timer Output Compare Driver. Note: To access the source tree without needing an OpenCores account, click the “Browse” link next to the “SVN” label in the top left corner. The source files are in “timerocd/trunk/src/”, which can be built under the free version of Xilinx ISE. The prebuilt binary file is at “timerocd/trunk/xilinx/TimerOCD/TimerOCD.bin”, which can be loaded directly into the Numato Mimas module using the Python programming scripts on the Numato website.
Here’s a demo of the first prototype of this interrupter back when it was still running at 16-note polyphony on a single Tesla Coil: Amazing Grace on the Musical Tesla Coil. I don’t yet have a video of dual-coils on the new FPGA interrupter as I’m in the process of redesigning the primary windings to improve tunability (it isn’t perfectly tuned in this demo video – the arc should be even bigger!) and to try to alleviate some arc-over problems I’ve been experiencing (oh the joys of working with high voltage).
Final code for the host processor is still being developed.