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CPLD

author: mrengstad
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2 layer board of 0.70 x 2.00 inches (17.9 x 50.9 mm)
Uploaded: April 08, 2016
Shared: May 03, 2016
Total Price: $7.05

A simple breakout for the Xilinx XC9572 CPLD

The only additional component is the 3.3V LDO regulator. If you already have 3.3V available, a pin is available to bypass it. Inputs and outputs are 3.3V if you insert a jumper; otherwise, the outputs are powered from the VCCIO pin. While the IO is 5V tolerant, the VCCIO must be less than 3.3V, for instance, 2.5V or 1.8V.

The breakout tested fine, and it works like a charm.

A simple breakout for the Xilinx XC9572 CPLD

The only additional component is the 3.3V LDO regulator. If you already have 3.3V available, a pin is available to bypass it. Inputs and outputs are 3.3V if you insert a jumper; otherwise, the outputs are powered from the VCCIO pin. While the IO is 5V tolerant, the VCCIO must be less than 3.3V, for instance, 2.5V or 1.8V.

The breakout tested fine, and it works like a charm.

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      Since this is a project designed by a community member, it may contain design errors that prevent it from working as intended. OSH Park cannot place any guarantees about the functionality or correctness of the design.
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