Shared projects

Divide by 1.5 v1.0

by nsayer.

2 layer board of 1.05x0.75 inches (26.67x19.05 mm).
Shared on March 13th, 2017 14:03.

This design is untested, but the theory is sound.

15 MHz goes in, 10 MHz comes out.

  • IC1 - 74LS74D
  • IC2 - 74LVC2G86
  • IC3 - 74LVC2G04
  • IC4 - 74LVC1G17
  • R1 - 1 MΩ
  • R2 - 1 kΩ
  • R3 & R4 - 50 Ω
  • C1 - C4 - 0.1µF
  • C5 - 10 pF
  • C6 & C7 - 220 pF
  • C8 - 22 pF
  • L1 - 1.2 µH

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Divide by 3 v2.0

by nsayer.

2 layer board of 0.90x0.75 inches (22.89x19.05 mm).
Shared on March 12th, 2017 18:32.

Adds a self-biased inverter on the input and PI network LPF on the output. The input can be sine or square and the output will be ~13 dBm sine.

  • IC1 - 74LS74D Dual D flip-flop
  • IC2 - 74AHC1G86DBV Single 2-input XOR
  • IC3 - 74LVC2G04 Single inverter
  • C1-C3 - 0.1µF
  • C4 - 10 pF
  • R1 - 1 MΩ
  • R3 & R4 - 50 Ω
  • L1 - 1.2 µH
  • C5 & C6 - 220 pF

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mini-DIN 6 breakout

by nsayer.

2 layer board of 0.90x0.60 inches (22.89x15.27 mm).
Shared on January 6th, 2017 01:39.

Accepts a CUI MD-40S or MD-60S. For the 40S, use pins 3-6 (corresponds to pins 1-4).

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Divide-by-3 v2

by nsayer.

2 layer board of 0.80x0.75 inches (20.32x19.05 mm).
Shared on July 7th, 2016 02:55.

2 D + 1 XOR variant. Circuit courtesy of Charles Steinmetz via the Time Nuts mailing list.

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GPS Disciplined FE-5680A v1.6.4

by nsayer.

2 layer board of 4.00x2.05 inches (101.60x52.15 mm).
Shared on July 7th, 2016 02:53.

See the Hackaday project page.

Almost the same as v1.6.3, but adds pi network to one output for a 13 dBm into 50 Ω sine port.

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